Front Inner Page - Volume 5 No.2 April 2018

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  • Title

    :

    Complementary Metal Oxide Semiconductor based current mode threshold Logic gate designs

    Authors

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    Ms.Sankari P 1,Mr. Veluchamy.S 2

    Keywords

    :

    -

    Issue Date

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    April 2018

    Abstract

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    This process presents a new implementation of current mode threshold functions for improved gate delay and switching energy. An analytical method is also proposed in order to identify quickly the sensor size that minimizes the gate delay. Simulation results on different gates implemented using the optimum sensor size indicates that the proposed current mode implementation method outperforms consistently the existing implementations in delay as well as switching energy. Logical processing in TLGs is more sophisticated than the traditional Boolean gates, and TLGs can implement complex logic functions. A basic TLG consists of Ninputs, a weight value for each input, and a threshold weight. The sum of the input weights is compared with the threshold weight. This process fully implemented in 25nm CMOS technology for future chip integration process.

    Page(s)

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    1-8

    ISSN

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    2347- 4734

    Source

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    Vol. 5, No.2, April 2018

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