Front Inner Page - Volume 5 No.3 June 2018

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  • Title

    :

    FPGA DATA ACQUISITION SYSTEM IN ETHERNET COMMUNICATION LINKS

    Authors

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    Deepa.C1,Arun.V 2

    Keywords

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    FPGA, Data Acquisition system, COMPASS

    Issue Date

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    June 2018

    Abstract

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    FPGA technology combines the flexibility in implementing the interface to the detectors, high data throughput and access to external memory. The FPGA-based data acquisition system of the COMPASS experiment offers a complete event building in the FPGA firmware that consists of data readouts multiplexer modules and a switch module. The system thus includes front-end cores, the FPGA-based event builder core and L1 trigger generation cores. The front-end interface is represented by a TDC core and an interface to the external ADC. The front-end modules perform digitization of the incoming detector signal. The data concentrator modules collect data from the front-ends, combine them into an event and send the events to the FPGA Data Acquisition system. The trigger generator is used in parallel to the data concentrator. It collects data from the front-ends and uses the information to generate a trigger signal. The detectors send data over S links. The links with the low data rate are multiplexed in the S-Link multiplexer before the event builder. The event building is done in two stages, S-Links which are the multiplexer modules and multiplexed data streams are then sent to a switch module where the final events are built in FPGA firmware and distributed to readout PCs over S-Links. The multiplexer and the switch modules are connected to the COMPASS trigger and timing system which plays an important role in the error recovery of the data chain.

    Page(s)

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    1-5

    ISSN

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    2347- 4734

    Source

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    Vol. 5, No.3, June 2018

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